1. Field of the Invention
This invention relates to a compound semiconductor device operating at high frequencies, especially to a compound semiconductor device operating at a frequency of about 2.4 GHz or higher and to a method for manufacturing such a device.
2. Discussion of the Related Art
Mobile communication devices such as mobile telephones often utilize microwaves in the GHz range and commonly need a switching device for switching high frequency signals, which is used in a switching circuit for changing antennas and in a switching circuit for transmitting and receiving the signals. A typical example of such a switching device can be found in Japanese Laid-Open Patent Publication No. Hei 9-181642. Such a device often uses a field-effect transistor (called FET hereinafter) made on a gallium arsenide (GaAs) substrate as the material is suitable for being used under high frequency, and developments have been made in forming a monolithic microwave integrated circuit (MMIC) by integrating aforementioned switching circuits.
FIG. 19A is a cross-sectional view of a conventional GaAs FET. The GaAs substrate 1 is without doping, and has, beneath its surface, an n-type channel region (or a channel layer) 2 formed by doping n-type dopants. A gate electrode 3 is placed on the surface of the channel region 2, forming a Schottky contact, and two signal electrodes, namely a source 4 and drain electrode 5, are placed on both sides of the gate electrode 3 forming ohmic contacts to the surface of the channel region 2. In this transistor configuration, a voltage applied to the gate electrode 3 creates a depletion layer within the channel region 2 beneath the gate electrode 3 and thus controls the channel current between the source electrode 4 and the drain electrode 5.
FIG. 19B shows a basic circuit configuration of a conventional compound semiconductor switching device, called SPDT (Single Pole Double Throw), using GaAs FETs. One of the two signal electrodes, which can be either a source electrode or a drain electrode, of each FET (FET1 denoting the first FET and FET2 denoting the second FET) is connected to a common electrode IN. Another of the two signal electrodes of each FET (FET1 and FET2) is connected to an output terminal (OUT1 and OUT2). The gate of FET1 and that of FET2 are connected to the control terminals Ctl-1 and Ctl-2 through resistors R1 and R2, respectively. A complementary signal is applied to the first and second control terminals, Ctl-1 and Ctl-2. When a high level signal is applied to the control terminal of an FET, the FET changes to an on-state and forms a signal pass from the common input terminal IN to the output terminal of the FET. The role of the resistors R1 and R2 is to prevent the leaking of the high frequency signals through the gate electrodes to the DC voltage applied on the control terminals (Ctl-1 and Ctl-2).
An equivalent circuit of the aforementioned conventional compound semiconductor switching device is shown in FIG. 20. In the microwave technology, the standard characteristic impedance is 50 xcexa9, and, thus, in this case the characteristic impedance of each terminal is 50 xcexa9 (R1=R2=R3=50 xcexa9). With the voltages of the three terminals being represented by V1, V2, and V3, respectively, the insertion loss and the isolation are given by the following equations I and II:
Insertion Loss=20 log(V2/V1)[dB]xe2x80x83xe2x80x83[I]
Isolation=20 log(V3/V1)[dB]xe2x80x83xe2x80x83[II]
Equation I is the insertion loss expressed in dB when a signal is transmitted from the common input terminal IN to the output terminal OUT1, and equation II expresses the isolation between the common input terminal IN and the output terminal OUT2, also in dB.
In this type of compound semiconductor switching device, it is required that the insertion loss be minimal while improving the isolation when one designs an FET which is inserted in series into the pass. The reason a GaAs FET is used as the FET in this type of device is that GaAs has a higher electron mobility than silicon and thus a lower electric resistance, making it easier to attain a low insertion loss, and that a GaAs substrate is a semi-insulating material suitable for attaining high isolation between the signal passes. On the other hand, GaAs substrates are more expensive than silicon substrates, and such devices cannot compete with silicon devices once a comparable device, such as a PIN diode, is made from silicon substrates.
FIG. 21 shows a circuit of a compound semiconductor switching device which has been used in commercial products. In this configuration, shunt FET3 and shunt FET4 are introduced between the output terminals OUT1, OUT2 of the switching FETs and the ground, such that the complementary signals from the control terminals Ctl-1 and Ctl-2 are applied on the gates of shunt FET3 and shunt FET4, respectively. As a result, when FET1 is at an on-state, shunt FET4 is also at an on-state, while FET2 and shunt EFT3 are at an off-state.
In this configuration, when the signal between the common input terminal IN and the output terminal OUT1 is switched on, and accordingly the signal between the common input terminal IN and the output terminal OUT2 is switched off, the input signal leaking to the output terminal OUT2 is directed to ground through a capacitor C connected to ground. Thus, it is possible to improve the isolation over the configuration without the shunt FETs.
The conventional design guidelines for compound semiconductor switching devices seek to increase the gate width for reducing the on-state resistance, thereby reducing the insertion loss. Increasing gate width, then, leads to an increase in the size of FET1 and FET2, resulting in a larger overall chip size.
Furthermore, many compound semiconductor switching devices utilize semi-insulating substrates such as GaAs substrates, and the wiring for electronic circuit and the connecting pads for bonding the bonding wires under heat and pressure are directly formed on the substrates. Since high frequency signals in the GHz range are applied to the device, it is required that there be a certain separation between the neighboring circuit wiring portions for assuring proper isolation between them. The isolation required for compound semiconductor switching device is 20 dB or higher, and it has been experimentally proved that a separation of 20 xcexcm or more is required to assure this level of isolation. The connecting pads, which usually occupy a significant portion of the substrate surface, also need, as an element of the device circuit, this separation from the most neighboring circuit wiring, thus further contributing to the trend of increasing overall chip size.
In summary, the conventional design guidelines for compound semiconductor switching devices seek to increase the gate width in order to reduce the on-state resistance, thereby reducing the insertion loss. The large width of the gate electrode, however, leads to increased capacitance of the gate electrode, resulting in reduced isolation. Thus, it is inevitable that a shunt FET has to be introduced into the circuit for directing the leaking input signal to ground for improving isolation.
Thus, the conventional compound semiconductor switching device has an extremely large chip size, with the typical size being 1.07xc3x970.50 mm. This is against the current semiconductor design trend, in which cost reduction is sought by reducing the chip size. As a result, expensive compound semiconductor devices for switching have been replaced by inexpensive silicon-based counterparts and have lost their share of the market.
Therefore, this invention is directed to compound semiconductor devices, including but not limited to switching devices, particularly for use at frequencies of about 2.4 GHz and higher, which have a significantly smaller chip size than conventional devices while maintaining low insertion loss and high isolation.
This invention provides a compound semiconductor circuit device having a substrate made of a compound semiconductor, a connecting pad which is formed directly on the substrate and a impurity region which is formed underneath the connecting pad and prevents a depletion layer from expanding beyond the high dopant region. The impurity region may also be formed underneath wiring layers on the substrate. Such an impurity region prevents extension of the depletion region, and thus high frequency signal losses between the connecting pads, between the connecting pad and the wiring layer, and between portions of the wiring layer, even when the separation is less than 20 xcexcm.
The invention also provides a compound semiconductor circuit device having a first and second FET, a common input terminal connected to signal electrodes of the FETs, a first and second output terminal connected to the signal electrode of the first and second FET, first and second control terminal connected to the gate electrodes of the first FET and second FET, and a impurity region which is formed underneath connecting pads for the terminals. Again, the impurity region prevents extension of the depletion region, and thus high frequency signal losses between the connecting pads, between the connecting pad and the wiring layer, and between portions of the wiring layer, even when the separation is less than 20 xcexcm.
In the devices according to the invention, the gate width, Wg, of each of the first and second FET""s is no more than 700 xcexcm and the gate length, Lg, is no more than about 0.5 xcexcm.
The invention further includes a method for manufacturing such compound semiconductor devices comprising the steps of depositing an insulating cover, preferably a silicon nitride film, on a substrate; forming on the substrate a source and a drain region adjacent to a channel region, further forming an impurity region underneath of a connecting pad and/or a wiring layer; forming a source and a drain electrode; removing the insulating cover from the impurity region; forming a gate electrode and forming the connection pad and/or the wiring layer; and attaching a bonding wire to the connection pad. The silicon nitride film deposited on top of the substrate serves as a general insulating cover. Since the impurity region underneath the connection pad and the wiring layer ensure sufficient isolation without additional insulation cover, the silicon nitride film can according to the invention be removed from the impurity region before the bonding wire is attached to the connection pad. By virtue of this any risk of a breakage of the silicon nitride film underneath the connecting is eliminated. This leads to simpler and more cost effective manufacturing as well as to a higher yield rate of the inventive compound semiconductor device.